[Bug 2098421] Re: U-Boot 2024.01 fails to boot on RISC-V with QEMU 9.0 and cpu=max

Heinrich Schuchardt 2098421 at bugs.launchpad.net
Thu Feb 13 22:59:34 UTC 2025


** Description changed:

+ [ Impact ]
+ 
  RISC-V device-trees have moved to using riscv,isa-extensions instead of
  riscv,isa. If riscv,isa is missing, U-Boot 2024.01 fails to boot. This
  can be demonstrated with QEMU 9.0 and cpu=max.
  
  The following patches provide a remedy:
  
  0d95add3b1c7 ("riscv: cpu: improve multi-letter extension detection in supports_extension()"
  b90edde70127 ("riscv: don't read riscv, isa in the riscv cpu's get_desc()")
  f39b1b77d822 ("riscv: support extension probing using riscv, isa-extensions")
+ 
+ [Test Plan ]
+ 
+ With QEMU 9.0 installed run:
+ 
+ qemu-system-riscv64 -M virt -cpu max \
+ -kernel /usr/lib/u-boot/qemu-riscv64_smode/uboot.elf
+ 
+ For regression testing:
+ 
+ Install u-boot-sifive on the Unmatched board and boot.
+ Install u-boot-microchip on the Icicle board and boot.
+ Install u-boot-starfive on the VisionFive 2 board and boot.
+ 
+ [ Where problems could occur ]
+ 
+ Booting on QEMU or real hardware might fail if the implementation of ISA
+ string parsing were incorrect.
+ 
+ [ Other Info ]
+ 
+ n/a

** Summary changed:

- U-Boot 2024.01 fails to boot on RISC-V with QEMU 9.0 and cpu=max
+ [SRU] U-Boot 2024.01 fails to boot on RISC-V with QEMU 9.0 and cpu=max

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https://bugs.launchpad.net/bugs/2098421

Title:
  [SRU] U-Boot 2024.01 fails to boot on RISC-V with QEMU 9.0 and cpu=max

Status in u-boot package in Ubuntu:
  New
Status in u-boot source package in Noble:
  New
Status in u-boot source package in Oracular:
  New
Status in u-boot source package in Plucky:
  New

Bug description:
  [ Impact ]

  RISC-V device-trees have moved to using riscv,isa-extensions instead
  of riscv,isa. If riscv,isa is missing, U-Boot 2024.01 fails to boot.
  This can be demonstrated with QEMU 9.0 and cpu=max.

  The following patches provide a remedy:

  0d95add3b1c7 ("riscv: cpu: improve multi-letter extension detection in supports_extension()"
  b90edde70127 ("riscv: don't read riscv, isa in the riscv cpu's get_desc()")
  f39b1b77d822 ("riscv: support extension probing using riscv, isa-extensions")

  [Test Plan ]

  With QEMU 9.0 installed run:

  qemu-system-riscv64 -M virt -cpu max \
  -kernel /usr/lib/u-boot/qemu-riscv64_smode/uboot.elf

  For regression testing:

  Install u-boot-sifive on the Unmatched board and boot.
  Install u-boot-microchip on the Icicle board and boot.
  Install u-boot-starfive on the VisionFive 2 board and boot.

  [ Where problems could occur ]

  Booting on QEMU or real hardware might fail if the implementation of
  ISA string parsing were incorrect.

  [ Other Info ]

  n/a

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