[Bug 2101084] Re: GCC produces wrong code for arm64+sve in some cases

[Chengen Du]

** Description changed:

- This bug-report is to request patching of the GCC bug 118976 in the
- Ubuntu gcc packages to avoid correctness issues, especially in 24.04 and
- 22.04 LTS releases.
+ [Impact]
+ This issue affects SVE vectorization on arm64 platforms, specifically in cases where bitwise-not operations are applied during optimization.
  
- This issue effects SVE vectorization which involves bitwise-not during
- optimization on arm64 platforms.  It was reported and fixed in
- https://gcc.gnu.org/bugzilla/show_bug.cgi?id=118976.
+ [Fix]
+ This issue has been resolved by an upstream patch.
  
- For gcc 8-11 there will be no minor releases as they are EOL from GCC
- team.  For gcc 11 through trunk the fix will be included in the next
- minor version, but my understanding is that Ubuntu LTS releases are
- unlikely to upgrade minor versions.
+ commit 78380fd7f743e23dfdf013d68a2f0347e1511550
+ Author: Richard Sandiford <richard.sandiford at arm.com>
+ Date: Tue Mar 4 10:44:35 2025 +0000
+ 
+     Fix folding of BIT_NOT_EXPR for POLY_INT_CST [PR118976]
+ 
+     There was an embarrassing typo in the folding of BIT_NOT_EXPR for
+     POLY_INT_CSTs: it used - rather than ~ on the poly_int.  Not sure
+     how that happened, but it might have been due to the way that
+     ~x is implemented as -1 - x internally.
+ 
+     gcc/
+             PR tree-optimization/118976
+             * fold-const.cc (const_unop): Use ~ rather than - for BIT_NOT_EXPR.
+             * config/aarch64/aarch64.cc (aarch64_test_sve_folding): New function.
+             (aarch64_run_selftests): Run it.
+ 
+ [Test Plan]
+ 1. Launch an instance using the latest generation of Graviton processors (Graviton4).
+ 2. Compile the code provided in the following link using the command `gcc -O3 -march=armv8.1-a+sve`
+ https://godbolt.org/z/c99bMjene
+ 3. Verify that the execution output does not contain the string "ERROR".
+ 
+ [Where problems could occur]
+ The issue is caused by a typo. If any regressions occur, they are expected to impact only specific partial instructions under certain scenarios, rather than disrupting the overall functionality.

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https://bugs.launchpad.net/bugs/2101084

Title:
  GCC produces wrong code for arm64+sve in some cases

Status in gcc:
  Fix Released
Status in gcc-10 package in Ubuntu:
  New
Status in gcc-11 package in Ubuntu:
  New
Status in gcc-13 package in Ubuntu:
  New
Status in gcc-14 package in Ubuntu:
  New
Status in gcc-8 package in Ubuntu:
  New
Status in gcc-9 package in Ubuntu:
  New
Status in gcc-10 source package in Focal:
  New
Status in gcc-8 source package in Focal:
  New
Status in gcc-9 source package in Focal:
  New
Status in gcc-10 source package in Jammy:
  New
Status in gcc-11 source package in Jammy:
  New
Status in gcc-9 source package in Jammy:
  New
Status in gcc-10 source package in Noble:
  New
Status in gcc-11 source package in Noble:
  New
Status in gcc-13 source package in Noble:
  New
Status in gcc-14 source package in Noble:
  New
Status in gcc-9 source package in Noble:
  New
Status in gcc-11 source package in Oracular:
  New
Status in gcc-13 source package in Oracular:
  New
Status in gcc-14 source package in Oracular:
  New
Status in gcc-11 source package in Plucky:
  New
Status in gcc-13 source package in Plucky:
  Won't Fix
Status in gcc-14 source package in Plucky:
  Won't Fix
Status in gcc-11 source package in Questing:
  New
Status in gcc-13 source package in Questing:
  Won't Fix
Status in gcc-14 source package in Questing:
  Won't Fix

Bug description:
  [Impact]
  This issue affects SVE vectorization on arm64 platforms, specifically in cases where bitwise-not operations are applied during optimization.

  [Fix]
  This issue has been resolved by an upstream patch.

  commit 78380fd7f743e23dfdf013d68a2f0347e1511550
  Author: Richard Sandiford <richard.sandiford at arm.com>
  Date: Tue Mar 4 10:44:35 2025 +0000

      Fix folding of BIT_NOT_EXPR for POLY_INT_CST [PR118976]

      There was an embarrassing typo in the folding of BIT_NOT_EXPR for
      POLY_INT_CSTs: it used - rather than ~ on the poly_int.  Not sure
      how that happened, but it might have been due to the way that
      ~x is implemented as -1 - x internally.

      gcc/
              PR tree-optimization/118976
              * fold-const.cc (const_unop): Use ~ rather than - for BIT_NOT_EXPR.
              * config/aarch64/aarch64.cc (aarch64_test_sve_folding): New function.
              (aarch64_run_selftests): Run it.

  [Test Plan]
  1. Launch an instance using the latest generation of Graviton processors (Graviton4).
  2. Compile the code provided in the following link using the command `gcc -O3 -march=armv8.1-a+sve`
  https://godbolt.org/z/c99bMjene
  3. Verify that the execution output does not contain the string "ERROR".

  [Where problems could occur]
  The issue is caused by a typo. If any regressions occur, they are expected to impact only specific partial instructions under certain scenarios, rather than disrupting the overall functionality.

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