ACK: [PATCH] acpi: iort: Add support for SMMUv3

[ivanhu]

On 03/03/2017 06:48 AM, Jeffrey Hugo wrote:
> Revision B of the IORT spec defines support for SMMUv3 nodes in IORT.  Add
> support for these nodes in the test.
>
> Signed-off-by: Jeffrey Hugo <jhugo at codeaurora.org>
> ---
>  src/acpi/iort/iort.c        | 49 +++++++++++++++++++++++++++++++++++++++++++++
>  src/lib/include/fwts_acpi.h | 17 ++++++++++++++++
>  2 files changed, 66 insertions(+)
>
> diff --git a/src/acpi/iort/iort.c b/src/acpi/iort/iort.c
> index b74ae91..930eb5f 100644
> --- a/src/acpi/iort/iort.c
> +++ b/src/acpi/iort/iort.c
> @@ -607,6 +607,52 @@ static void iort_check_smmu(
>  }
>
>  /*
> + *  Check IORT SMMUv3
> + */
> +static void iort_check_smmuv3(
> +	fwts_framework *fw,
> +	uint8_t *data,
> +	uint8_t *node_end,
> +	bool *passed)
> +{
> +	fwts_acpi_table_iort_smmuv3_node *node =
> +		(fwts_acpi_table_iort_smmuv3_node *)data;
> +
> +	iort_node_dump(fw, "IORT SMMUv3 node", (fwts_acpi_table_iort_node *)data);
> +	fwts_log_info_verbatim(fw, "  Base Address:             0x%16.16" PRIx64, node->base_address);
> +	fwts_log_info_verbatim(fw, "  Flags:                    0x%8.8" PRIx32, node->flags);
> +	fwts_log_info_verbatim(fw, "  Reserved:                 0x%8.8" PRIx32, node->reserved);
> +	fwts_log_info_verbatim(fw, "  VATOS Address:            0x%16.16" PRIx64, node->vatos_address);
> +	fwts_log_info_verbatim(fw, "  Model:                    0x%8.8" PRIx32, node->model);
> +	fwts_log_info_verbatim(fw, "  Event:                    0x%8.8" PRIx32, node->event);
> +	fwts_log_info_verbatim(fw, "  PRI:                      0x%8.8" PRIx32, node->pri);
> +	fwts_log_info_verbatim(fw, "  GERR:                     0x%8.8" PRIx32, node->gerr);
> +	fwts_log_info_verbatim(fw, "  Sync:                     0x%8.8" PRIx32, node->sync);
> +
> +	iort_id_mappings_dump(fw, data, node_end);
> +
> +	iort_node_check(fw, data, false, false, passed);
> +	iort_id_mappings_check(fw, data, node_end, passed);
> +
> +	if (node->model > 0) {
> +		*passed = false;
> +		fwts_failed(fw, LOG_LEVEL_HIGH,
> +			"IORTSmmuv3InvalidModel",
> +			"IORT SMMUv3 Model is 0x%" PRIx32 " and was expecting "
> +			"a model value of 0.", node->model);
> +	}
> +	if (node->flags & ~3) {
> +		*passed = false;
> +		fwts_failed(fw, LOG_LEVEL_HIGH,
> +			"IORTSmmuv3ReservedFlags",
> +			"IORT SMMUv3 Reserved Flags is 0x%" PRIx32 " and has "
> +			"some reserved bits [31:2] set when they should be zero.",
> +			node->flags);
> +	}
> +	fwts_log_nl(fw);
> +}
> +
> +/*
>   *  IORT Remapping Table
>   *     http://infocenter.arm.com/help/topic/com.arm.doc.den0049a/DEN0049A_IO_Remapping_Table.pdf
>   */
> @@ -676,6 +722,9 @@ static int iort_test1(fwts_framework *fw)
>  		case 0x03:
>  			iort_check_smmu(fw, data, node_end, &passed);
>  			break;
> +		case 0x04:
> +			iort_check_smmuv3(fw, data, node_end, &passed);
> +			break;
>  		default:
>  			/* reserved */
>  			passed = false;
> diff --git a/src/lib/include/fwts_acpi.h b/src/lib/include/fwts_acpi.h
> index 5bbe3b9..8bc1164 100644
> --- a/src/lib/include/fwts_acpi.h
> +++ b/src/lib/include/fwts_acpi.h
> @@ -1753,6 +1753,23 @@ typedef struct {
>  	*/
>  } __attribute__ ((packed)) fwts_acpi_table_iort_pci_root_complex_node;
>
> +typedef struct {
> +	fwts_acpi_table_iort_node iort_node;
> +	uint64_t	base_address;
> +	uint32_t	flags;
> +	uint32_t	reserved;
> +	uint64_t	vatos_address;
> +	uint32_t	model;
> +	uint32_t	event;
> +	uint32_t	pri;
> +	uint32_t	gerr;
> +	uint32_t	sync;
> +	/*
> +	   followed by array of ids_mappings at some offset
> +	   fwts_acpi_table_iort_id_mapping identifier_array[0];
> +	*/
> +} __attribute__ ((packed)) fwts_acpi_table_iort_smmuv3_node;
> +
>  /*
>   * ACPI STAO (Status Override Table)
>   *   http://wiki.xenproject.org/mediawiki/images/0/02/Status-override-table.pdf
>

Acked-by: Ivan Hu <ivan.hu at canonical.com>