ACK: [PATCH 02/10] cpu/msr: check SGX & LMCE in IA32_FEATURE_CONTROL (3ah)

ivanhu ivan.hu at canonical.com
Wed Jul 24 07:21:22 UTC 2019



On 7/12/19 1:46 AM, Alex Hung wrote:
> This includes SGX Launch Control Enable (BIT17), SGX Global Enable
> (BIT18) and LMCE On (BIT20)
> 
> Signed-off-by: Alex Hung <alex.hung at canonical.com>
> ---
>   src/cpu/msr/msr.c | 2 +-
>   1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/src/cpu/msr/msr.c b/src/cpu/msr/msr.c
> index a29e7cde..8972a161 100644
> --- a/src/cpu/msr/msr.c
> +++ b/src/cpu/msr/msr.c
> @@ -344,7 +344,7 @@ static const msr_info IA32_MSRs[] = {
>   	//{ "TIME_STAMP_COUNTER",	0x00000010,	0xffffffffffffffffULL, NULL },
>   	{ "PLATFORM_ID",		0x00000017,	0x001c000000000000ULL, NULL },
>   	{ "APIC_BASE",			0x0000001b,	0xfffffffffffffeffULL, NULL },
> -	{ "FEATURE_CONTROL",		0x0000003a,	0x000000000000ff07ULL, NULL },
> +	{ "FEATURE_CONTROL",		0x0000003a,	0x000000000016ff07ULL, NULL },
>   	{ "BIOS_SIGN_ID",		0x0000008b,	0xffffffff00000000ULL, NULL },
>   	{ "MTRRCAP",			0x000000fe,	0x0000000000000fffULL, NULL },
>   	/*
> 

Acked-by: Ivan Hu <ivan.hu at canonical.com>



More information about the fwts-devel mailing list