ACK: [PATCH 2/5] cpu/msr: add MSR_FEATURE_CONFIG to IA32_silvermont_MSRs

ivanhu ivan.hu at canonical.com
Wed Jul 24 08:02:42 UTC 2019



On 7/12/19 1:08 PM, Alex Hung wrote:
> BIT definition is as below:
> 1:0     AES Configuration (RW-L)
> 63:2    Reserved
> 
> Signed-off-by: Alex Hung <alex.hung at canonical.com>
> ---
>   src/cpu/msr/msr.c | 1 +
>   1 file changed, 1 insertion(+)
> 
> diff --git a/src/cpu/msr/msr.c b/src/cpu/msr/msr.c
> index e694c65d..1ff4de43 100644
> --- a/src/cpu/msr/msr.c
> +++ b/src/cpu/msr/msr.c
> @@ -482,6 +482,7 @@ static const msr_info IA32_atom_MSRs[] = {
>   
>   static const msr_info IA32_silvermont_MSRs[] = {
>   	{ "MSR_PMG_IO_CAPTURE_BASE",	0x000000e4,	0x000000000007ffffULL, NULL },
> +	{ "MSR_FEATURE_CONFIG",		0x0000013c,	0x0000000000000003ULL, NULL },
>   	{ NULL,				0x00000000,	0, NULL },
>   };
>   
> 

Acked-by: Ivan Hu <ivan.hu at canonical.com>



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