[PATCH 92/133] [Jaunty SRU] ARM.imx51 Freescale:ENGR00111687 IPUv3:Support IC local alpha blending

Brad Figg brad.figg at canonical.com
Thu Jul 9 16:49:22 UTC 2009


From: Liu Ying <b17645 at freescale.com>

Support IC local alpha blending.

Signed-off-by: Liu Ying <b17645 at freescale.com>
Signed-off-by: Brad Figg <brad.figg at canonical.com>
---
 drivers/mxc/ipu3/ipu_common.c    |   24 ++++++++++++++++++++++-
 drivers/mxc/ipu3/ipu_param_mem.h |   39 ++++++++++++++++++++++++++++++++++++++
 2 files changed, 62 insertions(+), 1 deletions(-)

diff --git a/drivers/mxc/ipu3/ipu_common.c b/drivers/mxc/ipu3/ipu_common.c
index 5499960..eb11b4a 100644
--- a/drivers/mxc/ipu3/ipu_common.c
+++ b/drivers/mxc/ipu3/ipu_common.c
@@ -103,6 +103,11 @@ static inline int _ipu_is_ic_chan(uint32_t dma_chan)
 	return ((dma_chan >= 11) && (dma_chan <= 22));
 }
 
+static inline int _ipu_is_ic_graphic_chan(uint32_t dma_chan)
+{
+	return (dma_chan == 14 || dma_chan == 15);
+}
+
 static inline int _ipu_is_irt_chan(uint32_t dma_chan)
 {
 	return ((dma_chan >= 45) && (dma_chan <= 50));
@@ -834,6 +839,15 @@ int32_t ipu_init_channel_buffer(ipu_channel_t channel, ipu_buffer_t type,
 	/* Build parameter memory data for DMA channel */
 	_ipu_ch_param_init(dma_chan, pixel_fmt, width, height, stride, u, v, 0,
 			   phyaddr_0, phyaddr_1);
+
+	/* Set correlative channel parameter of local alpha channel */
+	if (_ipu_is_ic_graphic_chan(dma_chan) &&
+	    (g_thrd_chan_en[IPU_CHAN_ID(channel)] == true)) {
+		_ipu_ch_param_set_separate_alpha_channel(dma_chan);
+		_ipu_ch_param_set_alpha_buffer_memory(dma_chan);
+		_ipu_ch_param_set_alpha_condition_read(dma_chan);
+	}
+
 	if (rot_mode)
 		_ipu_ch_param_set_rotation(dma_chan, rot_mode);
 
@@ -1364,6 +1378,10 @@ int32_t ipu_enable_channel(ipu_channel_t channel)
 		thrd_dma = channel_2_dma(channel, IPU_ALPHA_IN_BUFFER);
 		reg = __raw_readl(IDMAC_CHA_EN(thrd_dma));
 		__raw_writel(reg | idma_mask(thrd_dma), IDMAC_CHA_EN(thrd_dma));
+
+		sec_dma = channel_2_dma(channel, IPU_GRAPH_IN_BUFFER);
+		reg = __raw_readl(IDMAC_SEP_ALPHA);
+		__raw_writel(reg | idma_mask(sec_dma), IDMAC_SEP_ALPHA);
 	}
 
 	if ((channel == MEM_DC_SYNC) || (channel == MEM_BG_SYNC) ||
@@ -1421,8 +1439,10 @@ int32_t ipu_disable_channel(ipu_channel_t channel, bool wait_for_stop)
 
 	if (g_sec_chan_en[IPU_CHAN_ID(channel)])
 		sec_dma = channel_2_dma(channel, IPU_GRAPH_IN_BUFFER);
-	if (g_thrd_chan_en[IPU_CHAN_ID(channel)])
+	if (g_thrd_chan_en[IPU_CHAN_ID(channel)]) {
+		sec_dma = channel_2_dma(channel, IPU_GRAPH_IN_BUFFER);
 		thrd_dma = channel_2_dma(channel, IPU_ALPHA_IN_BUFFER);
+	}
 
 	if ((channel == MEM_BG_SYNC) || (channel == MEM_FG_SYNC) ||
 	    (channel == MEM_DC_SYNC)) {
@@ -1472,6 +1492,8 @@ int32_t ipu_disable_channel(ipu_channel_t channel, bool wait_for_stop)
 	if (g_thrd_chan_en[IPU_CHAN_ID(channel)] && idma_is_valid(thrd_dma)) {
 		reg = __raw_readl(IDMAC_CHA_EN(thrd_dma));
 		__raw_writel(reg & ~idma_mask(thrd_dma), IDMAC_CHA_EN(thrd_dma));
+		reg = __raw_readl(IDMAC_SEP_ALPHA);
+		__raw_writel(reg & ~idma_mask(sec_dma), IDMAC_SEP_ALPHA);
 		__raw_writel(idma_mask(thrd_dma), IPU_CHA_CUR_BUF(thrd_dma));
 	}
 
diff --git a/drivers/mxc/ipu3/ipu_param_mem.h b/drivers/mxc/ipu3/ipu_param_mem.h
index 535f66a..44f5a07 100644
--- a/drivers/mxc/ipu3/ipu_param_mem.h
+++ b/drivers/mxc/ipu3/ipu_param_mem.h
@@ -168,6 +168,9 @@ static inline void _ipu_ch_param_init(int ch,
 		ipu_ch_param_set_field(&params, 1, 78, 7, 31);	/* burst size */
 
 		_ipu_ch_params_set_packing(&params, 5, 0, 6, 5, 5, 11, 1, 16);
+		/* Set WID3 to be 8-bit for seperate alpha channel */
+		if (ch == 14 || ch == 15)
+			ipu_ch_param_set_field(&params, 1, 125, 3, 7);
 		break;
 	case IPU_PIX_FMT_BGR24:
 		ipu_ch_param_set_field(&params, 0, 107, 3, 1);	/* bits/pixel */
@@ -175,6 +178,9 @@ static inline void _ipu_ch_param_init(int ch,
 		ipu_ch_param_set_field(&params, 1, 78, 7, 19);	/* burst size */
 
 		_ipu_ch_params_set_packing(&params, 8, 0, 8, 8, 8, 16, 1, 24);
+		/* Set WID3 to be 8-bit for seperate alpha channel */
+		if (ch == 14 || ch == 15)
+			ipu_ch_param_set_field(&params, 1, 125, 3, 7);
 		break;
 	case IPU_PIX_FMT_RGB24:
 	case IPU_PIX_FMT_YUV444:
@@ -183,6 +189,9 @@ static inline void _ipu_ch_param_init(int ch,
 		ipu_ch_param_set_field(&params, 1, 78, 7, 19);	/* burst size */
 
 		_ipu_ch_params_set_packing(&params, 8, 16, 8, 8, 8, 0, 1, 24);
+		/* Set WID3 to be 8-bit for seperate alpha channel */
+		if (ch == 14 || ch == 15)
+			ipu_ch_param_set_field(&params, 1, 125, 3, 7);
 		break;
 	case IPU_PIX_FMT_BGRA32:
 	case IPU_PIX_FMT_BGR32:
@@ -314,6 +323,36 @@ static inline void _ipu_ch_param_set_block_mode(uint32_t ch)
 	ipu_ch_param_mod_field(ipu_ch_param_addr(ch), 0, 117, 2, 1);
 };
 
+static inline void _ipu_ch_param_set_separate_alpha_channel(uint32_t ch)
+{
+	ipu_ch_param_mod_field(ipu_ch_param_addr(ch), 1, 89, 1, 1);
+};
+
+static inline void _ipu_ch_param_set_alpha_condition_read(uint32_t ch)
+{
+	ipu_ch_param_mod_field(ipu_ch_param_addr(ch), 1, 149, 1, 1);
+};
+
+static inline void _ipu_ch_param_set_alpha_buffer_memory(uint32_t ch)
+{
+	int alp_mem_idx;
+
+	switch (ch) {
+	case 14: /* PRP graphic */
+		alp_mem_idx = 0;
+		break;
+	case 15: /* PP graphic */
+		alp_mem_idx = 1;
+		break;
+	default:
+		dev_err(g_ipu_dev, "unsupported correlative channel of local "
+			"alpha channel\n");
+		return;
+	}
+
+	ipu_ch_param_mod_field(ipu_ch_param_addr(ch), 1, 90, 3, alp_mem_idx);
+};
+
 static inline void _ipu_ch_param_set_interlaced_scan(uint32_t ch)
 {
 	u32 stride;
-- 
1.6.0.4





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