[Maverick] [PATCH 0/6] xsaveopt instruction support

leann.ogasawara at canonical.com leann.ogasawara at canonical.com
Tue Aug 24 01:58:09 UTC 2010


It's been requested that we provide xsaveopt instruction support in
Maverick which can be leveraged by Intel Sandy Bridge.  This is a new
feature to improve performance of the XSAVE operation by reducing the
amount of data written during an XSAVE operation.  All patches are
currently upstream in 2.6.35-rc1.  Proposing these for Maverick.

Thanks,
Leann

Suresh Siddha (6):
  x86, cpu: Make init_scattered_cpuid_features() consider cpuid
    subleaves
  x86, cpu: Add xsaveopt cpufeature
  x86, cpu: Enumerate xsaveopt
  x86, xsave: Track the offset, size of state in the xsave layout
  x86, xsave: Sync xsave memory layout with its header for user
    handling
  x86, xsave: Use xsaveopt in context-switch path when supported

 arch/x86/include/asm/cpufeature.h          |    1 +
 arch/x86/include/asm/i387.h                |   14 ++++
 arch/x86/include/asm/xsave.h               |   19 ++++-
 arch/x86/kernel/cpu/addon_cpuid_features.c |   24 +++---
 arch/x86/kernel/cpu/common.c               |    8 ++
 arch/x86/kernel/i387.c                     |   11 +++
 arch/x86/kernel/xsave.c                    |  116 ++++++++++++++++++++++++++++
 7 files changed, 179 insertions(+), 14 deletions(-)





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