[PATCH] Quirk to fix suspend/resume on another Lenovo ThinkPad Edge, model 030246G.

Mon Feb 14 19:16:48 UTC 2011

Hallo!

On Mon, 14 Feb 2011 15:27:10 +0100, Stefan Bader <stefan.bader at canonical.com> wrote:
> Seems that we've identified the root cause.
> 
> I wondered why systems with the problem have configured IOAPIC pin
> with polarity=1 (low active).  That was different to what the working
> systems used.
> 
> Switching the configuration to the usual polarity=0 (high active)
> fixed the issue.
> 
> The explanation is that when hpet interrupt is triggerd, signal goes
> from low to high. (AFAIK HPET spec even mentions that HPET interrupts
> are all active high.)
> 
> Now if IO-APIC pin is configured as low active it just ignores this
> signal change. It just triggers later when for next interrupt signal
> will go from high to low and high again. (That happens the first time
> after resume when the HPET counter wrapped around.)
> 
> Setting the correct polarity fixes the detection of the first hpet
> interrupt after resume.
> 
> To confirm that your systems behave similar you should boot with
> "apic=debug" kernel parameter. The output for IO APIC should show
> polarity=1 for IO APIC pin 2, e.g.
> 
>  [    0.158179] IO APIC #2......
>   ...
>  [    0.158205]  NR Dst Mask Trig IRR Pol Stat Dmod Deli Vect:
>  [    0.158210]  00 000 1    0    0   0   0    0    0    00
>  [    0.158217]  01 003 0    0    0   0   0    1    1    31
>  [    0.158224]  02 003 0    0    0   1   0    1    1    30

Confirmed; see below.

> Furthermore you can check with attached test patch whether changing
> the polarity fixes the problem on your system. IO APIC debug output
> with this patch should change to
> 
>  [    0.156170] IO APIC #2......
>   ...
>  [    0.156197]  NR Dst Mask Trig IRR Pol Stat Dmod Deli Vect:
>  [    0.156202]  00 000 1    0    0   0   0    0    0    00
>  [    0.156209]  01 003 0    0    0   0   0    1    1    31
>  [    0.156216]  02 003 0    0    0   0   0    1    1    30
> 
> 
> I'll come up with an SB800 quirk asap. (Of course we'll also try to
> fix the respective BIOSes but too often BIOS updates are only
> available for a limited time period.)

In case this helps someone -- here is the ``apic=debug'' dmesg output of
the original Ubuntu maverick linux-image-2.6.35-26-generic 2.6.35-26.46
package (suspend/resume broken) vs. my rebuilt one that has the patch /
hack applied that I posted in this thread (suspend/resume functional).
(I stripped off some uninteresting bits of the diff.)

    - Linux version 2.6.35-26-generic (buildd at crested) (gcc version 4.4.5 (Ubuntu/Linaro 4.4.4-14ubuntu5) ) #46-Ubuntu SMP Sun Jan 30 06:59:07 UTC 2011 (Ubuntu 2.6.35-26.46-generic 2.6.35.10)
    + Linux version 2.6.35-26-generic (root at Paddy) (gcc version 4.4.5 (Ubuntu/Linaro 4.4.4-14ubuntu5) ) #46 SMP Sun Feb 13 13:09:55 CET 2011 (Ubuntu 2.6.35-26.46-generic 2.6.35.10)
    [...]
    + ------------[ cut here ]------------
    + WARNING: at /home/thomi/tmp/linux-2.6.35/arch/x86/kernel/acpi/boot.c:1345 dmi_ignore_irq0_timer_override+0x2f/0x51()
    + Hardware name: 030246G
    + ati_ixp4x0 quirk not complete.
    + Modules linked in:
    + Pid: 0, comm: swapper Not tainted 2.6.35-26-generic #46
    + Call Trace:
    +  [<ffffffff8106093f>] warn_slowpath_common+0x7f/0xc0
    +  [<ffffffff81060a36>] warn_slowpath_fmt+0x46/0x50
    +  [<ffffffff81af84bc>] dmi_ignore_irq0_timer_override+0x2f/0x51
    +  [<ffffffff8147d71d>] dmi_check_system+0x3d/0x60
    +  [<ffffffff81af8c0d>] acpi_boot_table_init+0x10/0x85
    +  [<ffffffff81af2b73>] setup_arch+0x68c/0x7a3
    +  [<ffffffff81aed9ec>] start_kernel+0xdd/0x390
    +  [<ffffffff81aed341>] x86_64_start_reservations+0x12c/0x130
    +  [<ffffffff81aed43f>] x86_64_start_kernel+0xfa/0x109
    + ---[ end trace a7919e7f17c0a725 ]---
    + ThinkPad Edge detected: Ignoring BIOS IRQ0 pin2 override
    [...]
      ACPI: IOAPIC (id[0x02] address[0xfec00000] gsi_base[0])
      IOAPIC[0]: apic_id 2, version 33, address 0xfec00000, GSI 0-23
      ACPI: INT_SRC_OVR (bus 0 bus_irq 0 global_irq 2 low level)
    - ACPI: IRQ0 used by override.
    - ACPI: IRQ2 used by override.
    + ACPI: BIOS IRQ0 pin2 override ignored.
      ACPI: IRQ9 used by override.
      Using ACPI (MADT) for SMP configuration information
      ACPI: HPET id: 0x43538210 base: 0xfed00000
    [...]
      enabled ExtINT on CPU#0
      ENABLING IO-APIC IRQs
      init IO_APIC IRQs
    -  2-0 (apicid-pin) not connected
    + IOAPIC[0]: Set routing entry (2-0 -> 0x30 -> IRQ 0 Mode:0 Active:0)
      IOAPIC[0]: Set routing entry (2-1 -> 0x31 -> IRQ 1 Mode:0 Active:0)
    - IOAPIC[0]: Set routing entry (2-2 -> 0x30 -> IRQ 0 Mode:0 Active:1)
      IOAPIC[0]: Set routing entry (2-3 -> 0x33 -> IRQ 3 Mode:0 Active:0)
      IOAPIC[0]: Set routing entry (2-4 -> 0x34 -> IRQ 4 Mode:0 Active:0)
      IOAPIC[0]: Set routing entry (2-5 -> 0x35 -> IRQ 5 Mode:0 Active:0)
    [...]
      IOAPIC[0]: Set routing entry (2-14 -> 0x3e -> IRQ 14 Mode:0 Active:0)
      IOAPIC[0]: Set routing entry (2-15 -> 0x3f -> IRQ 15 Mode:0 Active:0)
       2-16 2-17 2-18 2-19 2-20 2-21 2-22 2-23 (apicid-pin) not connected
    - ..TIMER: vector=0x30 apic1=0 pin1=2 apic2=-1 pin2=-1
    + ..TIMER: vector=0x30 apic1=0 pin1=0 apic2=-1 pin2=-1
    + ..MP-BIOS bug: 8254 timer not connected to IO-APIC
    + ...trying to set up timer (IRQ0) through the 8259A ...
    + ..... (found apic 0 pin 0) ...
    + ....... works.
      CPU0: AMD Athlon(tm) II P340 Dual-Core Processor stepping 03
      Using local APIC timer interrupts.
      calibrating APIC timer ...
    [...]
      printing PIC contents
    - ... PIC  IMR: ffff
    + ... PIC  IMR: fffe
      ... PIC  IRR: 0201
      ... PIC  ISR: 0000
      ... PIC ELCR: 0c20
    [...]
      ... APIC IRR field:
      0000000000000000000000000000000000000000000000000000000000000000
      ... APIC ESR: 00000000
    - ... APIC ICR: 000008fd
    + ... APIC ICR: 000008ef
      ... APIC ICR2: 02000000
      ... APIC LVTT: 000300ef
      ... APIC LVTPC: 00000400
    [...]
      ... APIC EILVT2: 00010000
      ... APIC EILVT3: 00010000

    - number of MP IRQ sources: 15.
    + number of MP IRQ sources: 16.
      number of IO-APIC #2 registers: 24.
      testing the IO APIC.......................
    [...]
      .......     : Boot DT    : 0
      .... IRQ redirection table:
       NR Dst Mask Trig IRR Pol Stat Dmod Deli Vect:
    -  00 000 1    0    0   0   0    0    0    00
    +  00 003 0    0    0   0   0    1    1    30
       01 003 0    0    0   0   0    1    1    31
    -  02 003 0    0    0   1   0    1    1    30
    +  02 003 1    0    0   0   0    0    0    32
       03 003 0    0    0   0   0    1    1    33
       04 003 0    0    0   0   0    1    1    34
       05 003 0    0    0   0   0    1    1    35
    [...]
       16 000 1    0    0   0   0    0    0    00
       17 000 1    0    0   0   0    0    0    00
      IRQ to pin mappings:
    - IRQ0 -> 0:2
    + IRQ0 -> 0:0
      IRQ1 -> 0:1
    + IRQ2 -> 0:2
      IRQ3 -> 0:3
      IRQ4 -> 0:4
      IRQ5 -> 0:5

Grüße,
 Thomas
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