Ack: [Quantal][PATCH 0/5] GPU hangs regression on Quantal

[Brad Figg]

On 04/09/2013 09:06 AM, Luis Henriques wrote:
> BugLink: http://bugs.launchpad.net/bugs/1140716
> 
> As per a comment by Chris Wilson in the this bug report, the following
> commits should fix this issue:
> 
> 3ac7831314eba873d60b58718123c503f6961337 drm/i915: PIPE_CONTROL TLB invalidate requires CS stall
> 9a28977181724ebbd9bdc45291cf29da55a729ee drm/i915: TLB invalidation with MI_FLUSH_DW requires a post-sync op v3
> 7d54a904285b6e780291b91a518267bec5591913 drm/i915: Apply post-sync write for pipe control invalidates
> 
> These commits are clean cherry-picks if the following two extra commits
> are picked as well:
> 
> 97f209bcfc0c5db08d9badf8cbafd489f22a6e44 drm/i915: "Flush Me Harder" required on gen6+
> cc0f6398225ffd2b890ff83eafe212b1ae863cad drm/i915: PIPE_CONTROL_TLB_INVALIDATE
> 
> Ben Widawsky (1):
>   drm/i915: PIPE_CONTROL_TLB_INVALIDATE
> 
> Chris Wilson (1):
>   drm/i915: Apply post-sync write for pipe control invalidates
> 
> Daniel Vetter (1):
>   drm/i915: "Flush Me Harder" required on gen6+
> 
> Jesse Barnes (2):
>   drm/i915: TLB invalidation with MI_FLUSH_DW requires a post-sync op v3
>   drm/i915: PIPE_CONTROL TLB invalidate requires CS stall
> 
>  drivers/gpu/drm/i915/i915_reg.h         |  9 +++--
>  drivers/gpu/drm/i915/intel_ringbuffer.c | 62 ++++++++++++++++++++++++---------
>  drivers/gpu/drm/i915/intel_ringbuffer.h |  2 ++
>  3 files changed, 54 insertions(+), 19 deletions(-)
> 

These patches make me a little nervous. However, they are the recommended
solution by one of the upstream devs for a regression. I think we should
take these but keep a close eye on possible regressions that these might
produce.

If you don't feel I'm being conservative enough feel free to disagree.

Brad
-- 
Brad Figg brad.figg at canonical.com http://www.canonical.com