[3.16.y-ckt stable] Patch "ARM64: KVM: store kvm_vcpu_fault_info est_el2 as word" has been added to staging queue

Luis Henriques luis.henriques at canonical.com
Wed May 20 12:30:13 UTC 2015


This is a note to let you know that I have just added a patch titled

    ARM64: KVM: store kvm_vcpu_fault_info est_el2 as word

to the linux-3.16.y-queue branch of the 3.16.y-ckt extended stable tree 
which can be found at:

    http://kernel.ubuntu.com/git/ubuntu/linux.git/log/?h=linux-3.16.y-queue

This patch is scheduled to be released in version 3.16.7-ckt12.

If you, or anyone else, feels it should not be added to this tree, please 
reply to this email.

For more information about the 3.16.y-ckt tree, see
https://wiki.ubuntu.com/Kernel/Dev/ExtendedStable

Thanks.
-Luis

------

>From 18bfe9f637c59b6b8b6e862ee7b5488f83e0fbc4 Mon Sep 17 00:00:00 2001
From: Victor Kamensky <victor.kamensky at linaro.org>
Date: Thu, 12 Jun 2014 09:30:09 -0700
Subject: ARM64: KVM: store kvm_vcpu_fault_info est_el2 as word

commit ba083d20d8cfa9e999043cd89c4ebc964ccf8927 upstream.

esr_el2 field of struct kvm_vcpu_fault_info has u32 type.
It should be stored as word. Current code works in LE case
because existing puts least significant word of x1 into
esr_el2, and it puts most significant work of x1 into next
field, which accidentally is OK because it is updated again
by next instruction. But existing code breaks in BE case.

Signed-off-by: Victor Kamensky <victor.kamensky at linaro.org>
Acked-by: Christoffer Dall <christoffer.dall at linaro.org>
Acked-by: Marc Zyngier <marc.zyngier at arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier at arm.com>
Signed-off-by: Shannon Zhao <shannon.zhao at linaro.org>
Signed-off-by: Luis Henriques <luis.henriques at canonical.com>
---
 arch/arm64/kvm/hyp.S | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/kvm/hyp.S b/arch/arm64/kvm/hyp.S
index b0d1512acf08..5dfc8331c385 100644
--- a/arch/arm64/kvm/hyp.S
+++ b/arch/arm64/kvm/hyp.S
@@ -830,7 +830,7 @@ el1_trap:
 	mrs	x2, far_el2

 2:	mrs	x0, tpidr_el2
-	str	x1, [x0, #VCPU_ESR_EL2]
+	str	w1, [x0, #VCPU_ESR_EL2]
 	str	x2, [x0, #VCPU_FAR_EL2]
 	str	x3, [x0, #VCPU_HPFAR_EL2]





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