[PATCH] UBUNTU: SAUCE: i915_bpo: drm/i915: Setup DDI clk for MST on SKL

Timo Aaltonen tjaalton at ubuntu.com
Wed Nov 11 14:55:37 UTC 2015


This is for vivid SRU.

On 11.11.2015 16:53, Timo Aaltonen wrote:
> From: Ville Syrjälä <ville.syrjala at linux.intel.com>
> 
> BugLink: https://launchpad.net/bugs/1515169
> 
> Set up the DDI->PLL mapping on SKL also for MST links. Might help make
> MST operational on SKL.
> 
> v2: Rebased due to KBL
>     Improve the patch subject, Jesse provided the new one
> 
> Cc: Maarten Lankhorst <maarten.lankhorst at linux.intel.com>
> Signed-off-by: Ville Syrjälä <ville.syrjala at linux.intel.com>
> Link: http://patchwork.freedesktop.org/patch/msgid/1439826380-18403-1-git-send-email-ville.syrjala@linux.intel.com
> References: https://bugs.freedesktop.org/show_bug.cgi?id=91791
> Reviewed-by: Jesse Barnes <jbarnes at virtuousgeek.org>
> (backported from git://anongit.freedesktop.org/drm-intel e404ba8d06ff)
> Signed-off-by: Timo Aaltonen <timo.aaltonen at canonical.com>
> ---
>  ubuntu/i915/intel_ddi.c    | 49 +++++++++++++++++++++++++++-------------------
>  ubuntu/i915/intel_dp_mst.c |  8 +-------
>  ubuntu/i915/intel_drv.h    |  2 ++
>  3 files changed, 32 insertions(+), 27 deletions(-)
> 
> diff --git a/ubuntu/i915/intel_ddi.c b/ubuntu/i915/intel_ddi.c
> index d09d4f4..a322b76 100644
> --- a/ubuntu/i915/intel_ddi.c
> +++ b/ubuntu/i915/intel_ddi.c
> @@ -1857,30 +1857,21 @@ void bxt_ddi_vswing_sequence(struct drm_device *dev, u32 level,
>  	I915_WRITE(BXT_PORT_PCS_DW10_GRP(port), val);
>  }
>  
> -static void intel_ddi_pre_enable(struct intel_encoder *intel_encoder)
> +void intel_ddi_clk_select(struct intel_encoder *encoder,
> +			  const struct intel_crtc_state *pipe_config)
>  {
> -	struct drm_encoder *encoder = &intel_encoder->base;
> -	struct drm_device *dev = encoder->dev;
> -	struct drm_i915_private *dev_priv = dev->dev_private;
> -	struct intel_crtc *crtc = to_intel_crtc(encoder->crtc);
> -	enum port port = intel_ddi_get_encoder_port(intel_encoder);
> -	int type = intel_encoder->type;
> -	int hdmi_level;
> -
> -	if (type == INTEL_OUTPUT_EDP) {
> -		struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
> -		intel_edp_panel_on(intel_dp);
> -	}
> +	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
> +	enum port port = intel_ddi_get_encoder_port(encoder);
>  
> -	if (IS_SKYLAKE(dev)) {
> -		uint32_t dpll = crtc->config->ddi_pll_sel;
> +	if (IS_SKYLAKE(dev_priv)) {
> +		uint32_t dpll = pipe_config->ddi_pll_sel;
>  		uint32_t val;
>  
>  		/*
>  		 * DPLL0 is used for eDP and is the only "private" DPLL (as
>  		 * opposed to shared) on SKL
>  		 */
> -		if (type == INTEL_OUTPUT_EDP) {
> +		if (encoder->type == INTEL_OUTPUT_EDP) {
>  			WARN_ON(dpll != SKL_DPLL0);
>  
>  			val = I915_READ(DPLL_CTRL1);
> @@ -1888,7 +1879,7 @@ static void intel_ddi_pre_enable(struct intel_encoder *intel_encoder)
>  			val &= ~(DPLL_CTRL1_HDMI_MODE(dpll) |
>  				 DPLL_CTRL1_SSC(dpll) |
>  				 DPLL_CTRL1_LINK_RATE_MASK(dpll));
> -			val |= crtc->config->dpll_hw_state.ctrl1 << (dpll * 6);
> +			val |= pipe_config->dpll_hw_state.ctrl1 << (dpll * 6);
>  
>  			I915_WRITE(DPLL_CTRL1, val);
>  			POSTING_READ(DPLL_CTRL1);
> @@ -1904,11 +1895,29 @@ static void intel_ddi_pre_enable(struct intel_encoder *intel_encoder)
>  
>  		I915_WRITE(DPLL_CTRL2, val);
>  
> -	} else if (INTEL_INFO(dev)->gen < 9) {
> -		WARN_ON(crtc->config->ddi_pll_sel == PORT_CLK_SEL_NONE);
> -		I915_WRITE(PORT_CLK_SEL(port), crtc->config->ddi_pll_sel);
> +	} else if (INTEL_INFO(dev_priv)->gen < 9) {
> +		WARN_ON(pipe_config->ddi_pll_sel == PORT_CLK_SEL_NONE);
> +		I915_WRITE(PORT_CLK_SEL(port), pipe_config->ddi_pll_sel);
> +	}
> +}
> +
> +static void intel_ddi_pre_enable(struct intel_encoder *intel_encoder)
> +{
> +	struct drm_encoder *encoder = &intel_encoder->base;
> +	struct drm_device *dev = encoder->dev;
> +	struct drm_i915_private *dev_priv = dev->dev_private;
> +	struct intel_crtc *crtc = to_intel_crtc(encoder->crtc);
> +	enum port port = intel_ddi_get_encoder_port(intel_encoder);
> +	int type = intel_encoder->type;
> +	int hdmi_level;
> +
> +	if (type == INTEL_OUTPUT_EDP) {
> +		struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
> +		intel_edp_panel_on(intel_dp);
>  	}
>  
> +	intel_ddi_clk_select(intel_encoder, crtc->config);
> +
>  	if (type == INTEL_OUTPUT_DISPLAYPORT || type == INTEL_OUTPUT_EDP) {
>  		struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
>  
> diff --git a/ubuntu/i915/intel_dp_mst.c b/ubuntu/i915/intel_dp_mst.c
> index 8c127201..1d84771 100644
> --- a/ubuntu/i915/intel_dp_mst.c
> +++ b/ubuntu/i915/intel_dp_mst.c
> @@ -177,18 +177,12 @@ static void intel_mst_pre_enable_dp(struct intel_encoder *encoder)
>  	intel_mst->port = found->port;
>  
>  	if (intel_dp->active_mst_links == 0) {
> -		enum port port = intel_ddi_get_encoder_port(encoder);
> -
> -		/* FIXME: add support for SKL */
> -		if (INTEL_INFO(dev)->gen < 9)
> -			I915_WRITE(PORT_CLK_SEL(port),
> -				   intel_crtc->config->ddi_pll_sel);
> +		intel_ddi_clk_select(encoder, intel_crtc->config);
>  
>  		intel_ddi_init_dp_buf_reg(&intel_dig_port->base);
>  
>  		intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_ON);
>  
> -
>  		intel_dp_start_link_train(intel_dp);
>  		intel_dp_complete_link_train(intel_dp);
>  		intel_dp_stop_link_train(intel_dp);
> diff --git a/ubuntu/i915/intel_drv.h b/ubuntu/i915/intel_drv.h
> index 76252a88..1722111 100644
> --- a/ubuntu/i915/intel_drv.h
> +++ b/ubuntu/i915/intel_drv.h
> @@ -912,6 +912,8 @@ void intel_crt_init(struct drm_device *dev);
>  
>  
>  /* intel_ddi.c */
> +void intel_ddi_clk_select(struct intel_encoder *encoder,
> +			  const struct intel_crtc_state *pipe_config);
>  void intel_prepare_ddi(struct drm_device *dev);
>  void hsw_fdi_link_train(struct drm_crtc *crtc);
>  void intel_ddi_init(struct drm_device *dev, enum port port);
> 


-- 
t




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