[PATCH 1/2] pinctrl/amd: Configure GPIO register using BIOS settings

[Alex Hung]

From: "Agrawal, Nitesh-kumar" <Nitesh-kumar.Agrawal at amd.com>

In the function amd_gpio_irq_set_type, use the settings provided by
the BIOS,when the LevelTrig is Edge and activeLevel is HIGH, to configure
the GPIO registers. Ignore the settings from client.

BugLink: http://bugs.launchpad.net/bugs/1612006

Reviewed-by: Pankaj Sen <Pankaj.Sen at amd.com>
Signed-off-by:Nitesh Kumar Agrawal <Nitesh-kumar.Agrawal at amd.com>
Signed-off-by: Linus Walleij <linus.walleij at linaro.org>
(cherry picked from commit 499c7196dd182ba513ccb9620ee22aed3f9096fd)
Signed-off-by: Alex Hung <alex.hung at canonical.com>
---
 drivers/pinctrl/pinctrl-amd.c | 15 +++++++++++++++
 1 file changed, 15 insertions(+)

diff --git a/drivers/pinctrl/pinctrl-amd.c b/drivers/pinctrl/pinctrl-amd.c
index 7340ff7..bd544ee 100644
--- a/drivers/pinctrl/pinctrl-amd.c
+++ b/drivers/pinctrl/pinctrl-amd.c
@@ -388,12 +388,27 @@ static int amd_gpio_irq_set_type(struct irq_data *d, unsigned int type)
 	int ret = 0;
 	u32 pin_reg;
 	unsigned long flags;
+	u32 level_trig;
+	u32 active_level;
 	struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
 	struct amd_gpio *gpio_dev = to_amd_gpio(gc);
 
 	spin_lock_irqsave(&gpio_dev->lock, flags);
 	pin_reg = readl(gpio_dev->base + (d->hwirq)*4);
 
+	/*
+	 * When level_trig is set EDGE and active_level is set HIGH in BIOS
+	 * default settings, ignore incoming settings from client and use
+	 * BIOS settings to configure GPIO register.
+	 */
+	level_trig = pin_reg & (LEVEL_TRIGGER << LEVEL_TRIG_OFF);
+	active_level = pin_reg & (ACTIVE_LEVEL_MASK << ACTIVE_LEVEL_OFF);
+
+	if((!level_trig) &&
+	   ((active_level >> ACTIVE_LEVEL_OFF) == ACTIVE_HIGH)) {
+		type = IRQ_TYPE_EDGE_FALLING;
+	}
+
 	switch (type & IRQ_TYPE_SENSE_MASK) {
 	case IRQ_TYPE_EDGE_RISING:
 		pin_reg &= ~BIT(LEVEL_TRIG_OFF);
-- 
2.7.4