[j:intel-iotg][PULL][SRU] Enable Time Coordinated Compute interface driver on raptor lake
Stefan Bader
stefan.bader at canonical.com
Thu Apr 20 08:24:43 UTC 2023
On 19.04.23 20:54, Philip Cox wrote:
> BugLink: https://bugs.launchpad.net/bugs/lp1996675
> <https://bugs.launchpad.net/bugs/lp1996675>
>
> [Impact]Enable Time Coordinated Compute interface driver.
>
> [Fix]
> This is pulling in a set of patches to enable the TCC interface driver
> for raptor lake in the intel-iotg kernel.
Just as a note: the subject of this and for the submission which looks
to add the basic infrastructure look exactly identical up the the point
where Thunderbird cuts things off.
How likely do you think this will work out well... especially with
visually challenged people like me involved.
-Stefan
>
> [Test Case]
> I've tested the kernel, and didn't hit any regressions, and it will be
> thoroughly tested by QA once it is available in the PPA.
>
> [Where Problems Could Occur]
> The changes cherry-picked clean, except for one of them, which needed
> slight context changes . As this is exposing new functionality, the
> chance for regressions is low.
>
> ----------------------------------------------------------------
>
> The following changes since commit 900672bb3984f9ae4198ed7f7b1f734b6a8181e1:
>
> tcc: rounding possible non page-aligned ssram address (2023-04-19
> 11:58:20 -0400)
>
> are available in the Git repository at:
>
> git://git.launchpad.net/~philcox/+git/lp1996675
> <http://git.launchpad.net/~philcox/+git/lp1996675> philcox/lp1996675
>
> for you to fetch changes up to 4e4b4c25903b2da32f0ff7f1d39aa92ee47c643e:
>
> tcc: Choose different L3 cache miss perf event for ADL-N. (2023-04-19
> 13:56:49 -0400)
>
> ----------------------------------------------------------------
> Qiang Rao (6):
> Support RPL in measurement function.
> Assume default hardware prefetch bitmask in measurement function.
> tcc: fix patch style problem
> tcc: Map and show crl version number in /proc.
> tcc: Update hardware prefetcher disable bits for ADL and RPL in cache
> hit/miss measurement.
> tcc: Choose different L3 cache miss perf event for ADL-N.
>
> arch/x86/kernel/acpi/boot.c | 20 ++++--------
> drivers/tcc/tcc_buffer.c | 264
> +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++-------------------------------------------------------------------
> drivers/tcc/tcc_buffer.h | 140
> +++++++++++++++++++++++++---------------------------------------------------------
> include/acpi/actbl2.h | 27 +++++++---------
> 4 files changed, 209 insertions(+), 242 deletions(-)
>
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