[SRU][J:linux-bluefield][PATCH v1 1/1] UBUNTU: SAUCE: mlxbf_gige: fixes for msglvl infrastructure

[David Thompson]

BugLink: https://bugs.launchpad.net/bugs/2115754

This patch updates some logic in the msglvl infrastructure:
1) Don't log every TX_FIFO_FULL event as this can flood the
   kernel log. The proper approach is just to maintain the
   TX_FIFO_FULL statistics.  According to our chip designer,
   when the TX_FIFO_FULL bit is asserted, HW delays the next
   data read from the memory until there is enough space in
   the TX FIFO for that data, so there won’t be overrun or
   lost data.
2) Use "dev_dbg_ratelimited()" instead of "dev_dbg()" in case
   logging of any msglvl event happens quickly in succession

Signed-off-by: David Thompson <davthompson at nvidia.com>
---
 .../mellanox/mlxbf_gige/mlxbf_gige_main.c     | 20 +++++++++----------
 .../mellanox/mlxbf_gige/mlxbf_gige_tx.c       |  5 +----
 2 files changed, 11 insertions(+), 14 deletions(-)

diff --git a/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_main.c b/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_main.c
index 8763ed04ff38..097dccb7b550 100644
--- a/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_main.c
+++ b/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_main.c
@@ -179,16 +179,16 @@ static void mlxbf_gige_phy_timer(struct timer_list *t)
 
 void mlxbf_gige_dump_rx_tx(const char *str, struct mlxbf_gige *priv)
 {
-	dev_dbg(priv->dev, "%s tx_ci=0x%llx tx_pi=0x%llx rx_ci=0x%llx rx_pi=0x%llx int_mask=0x%llx\n", str,
-		readq(priv->base + MLXBF_GIGE_TX_CONSUMER_INDEX),
-		readq(priv->base + MLXBF_GIGE_TX_PRODUCER_INDEX),
-		readq(priv->base + MLXBF_GIGE_RX_CQE_PACKET_CI),
-		readq(priv->base + MLXBF_GIGE_RX_WQE_PI),
-		readq(priv->base + MLXBF_GIGE_INT_MASK));
-
-	dev_dbg(priv->dev, "  din_drop=0x%llx rx_dma=0x%llx rx_fifo=0x%llx rx_polarity=%d\n",
-		readq(priv->base + MLXBF_GIGE_RX_DIN_DROP_COUNTER), readq(priv->base + MLXBF_GIGE_RX_DMA),
-		readq(priv->base + MLXBF_GIGE_RX_FIFO_FULLNESS), priv->valid_polarity);
+	dev_dbg_ratelimited(priv->dev, "%s tx_ci=0x%llx tx_pi=0x%llx rx_ci=0x%llx rx_pi=0x%llx int_mask=0x%llx\n", str,
+			    readq(priv->base + MLXBF_GIGE_TX_CONSUMER_INDEX),
+			    readq(priv->base + MLXBF_GIGE_TX_PRODUCER_INDEX),
+			    readq(priv->base + MLXBF_GIGE_RX_CQE_PACKET_CI),
+			    readq(priv->base + MLXBF_GIGE_RX_WQE_PI),
+			    readq(priv->base + MLXBF_GIGE_INT_MASK));
+
+	dev_dbg_ratelimited(priv->dev, "  din_drop=0x%llx rx_dma=0x%llx rx_fifo=0x%llx rx_polarity=%d\n",
+			    readq(priv->base + MLXBF_GIGE_RX_DIN_DROP_COUNTER), readq(priv->base + MLXBF_GIGE_RX_DMA),
+			    readq(priv->base + MLXBF_GIGE_RX_FIFO_FULLNESS), priv->valid_polarity);
 }
 
 static int mlxbf_gige_open(struct net_device *netdev)
diff --git a/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_tx.c b/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_tx.c
index e126533251ac..5e9c0275c2d6 100644
--- a/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_tx.c
+++ b/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_tx.c
@@ -132,11 +132,8 @@ bool mlxbf_gige_handle_tx_complete(struct mlxbf_gige *priv)
 	u16 tx_ci;
 
 	tx_status = readq(priv->base + MLXBF_GIGE_TX_STATUS);
-	if (tx_status & MLXBF_GIGE_TX_STATUS_DATA_FIFO_FULL) {
-		if (netif_msg_tx_err(priv))
-			mlxbf_gige_dump_rx_tx("tx_fifo_full", priv);
+	if (tx_status & MLXBF_GIGE_TX_STATUS_DATA_FIFO_FULL)
 		priv->stats.tx_fifo_full++;
-	}
 	tx_ci = readq(priv->base + MLXBF_GIGE_TX_CONSUMER_INDEX);
 	stats = &priv->netdev->stats;
 
-- 
2.43.2