[SRU][N][PATCH 2/3] thermal: intel: intel_tcc_cooling: Use a model-specific bitmask for TCC offset

[Thibault Ferrante]

From: Ricardo Neri <ricardo.neri-calderon at linux.intel.com>

BugLink: https://bugs.launchpad.net/bugs/2103427

The TCC offset field in the register MSR_TEMPERATURE_TARGET is not
architectural. The TCC library provides a model-specific bitmask. Use it to
determine the maximum TCC offset.

Suggested-by: Zhang Rui <rui.zhang at intel.com>
Reviewed-by: Zhang Rui <rui.zhang at intel.com>
Signed-off-by: Ricardo Neri <ricardo.neri-calderon at linux.intel.com>
Link: https://patch.msgid.link/20240614211606.5896-3-ricardo.neri-calderon@linux.intel.com
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki at intel.com>
(cherry picked from commit be6bfb29c55e48567983e24aba7b6bf9a66a45ab)
Signed-off-by: Thibault Ferrante <thibault.ferrante at canonical.com>
---
 drivers/thermal/intel/intel_tcc_cooling.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/thermal/intel/intel_tcc_cooling.c b/drivers/thermal/intel/intel_tcc_cooling.c
index 6c392147e6d1..5bfc2b515c78 100644
--- a/drivers/thermal/intel/intel_tcc_cooling.c
+++ b/drivers/thermal/intel/intel_tcc_cooling.c
@@ -20,7 +20,7 @@ static struct thermal_cooling_device *tcc_cdev;
 static int tcc_get_max_state(struct thermal_cooling_device *cdev, unsigned long
 			     *state)
 {
-	*state = 0x3f;
+	*state = intel_tcc_get_offset_mask();
 	return 0;
 }
 
-- 
2.45.2