[PATCH 0/4][U/P] Support up to 2048 IRTEs for AMD IOMMU Interrupt remapping

You-Sheng Yang vicamo.yang at canonical.com
Fri Mar 21 12:20:43 UTC 2025


BugLink: https://bugs.launchpad.net/bugs/2103465

[Impact]

This is an enhancement to the existing AMD IOMMU Interrupt remapping
where it can support up to the architectural limit of 2K interrupts per
PCI function. The feature is available starting from Turin.

[Fix]

4 commits in linux-next since commit 1c608b0b280d ("iommu/amd: Introduce
generic function to set multibit feature value").

[Test Case]

Tested by AMD.

[Where problems could occur]

This affects only platforms with feature bit set in Extended Feature 2
Register (MMIO Offset 01A0h[NumIntRemapSup]).

[Other Info]

Nominate for Plucky only.

Kishon Vijay Abraham I (1):
  iommu/amd: Enable support for up to 2K interrupts per function

Sairaj Kodilkar (3):
  iommu/amd: Introduce generic function to set multibit feature value
  iommu/amd: Replace slab cache allocator with page allocator
  iommu/amd: Rename DTE_INTTABLEN* and MAX_IRQS_PER_TABLE macro

 drivers/iommu/amd/amd_iommu_types.h | 27 ++++++-----
 drivers/iommu/amd/init.c            | 64 +++++++++++--------------
 drivers/iommu/amd/iommu.c           | 72 +++++++++++++++++++++--------
 3 files changed, 93 insertions(+), 70 deletions(-)

-- 
2.48.1




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