[SRU][J][PATCH v2 14/20] x86/CPU/AMD: Get rid of amd_erratum_1485[]

[Juerg Haefliger]

From: "Borislav Petkov (AMD)" <bp at alien8.de>

No functional changes.

Signed-off-by: Borislav Petkov (AMD) <bp at alien8.de>
Reviewed-by: Nikolay Borisov <nik.borisov at suse.com>
Link: http://lore.kernel.org/r/20231120104152.13740-13-bp@alien8.de
(backported from commit 794c68b20408bb6899f90314e36e256924cc85a1)
[juergh: Adjusted context due to missing commit:
 8cc68c9c9e92 ("x86/CPU/AMD: Make sure EFER[AIBRSE] is set")]
CVE-2024-53114
Signed-off-by: Juerg Haefliger <juerg.haefliger at canonical.com>
---
 arch/x86/kernel/cpu/amd.c | 11 +++--------
 1 file changed, 3 insertions(+), 8 deletions(-)

diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c
index 53b3de8de74d..25f582898f39 100644
--- a/arch/x86/kernel/cpu/amd.c
+++ b/arch/x86/kernel/cpu/amd.c
@@ -60,10 +60,6 @@ static u32 nodes_per_socket = 1;
 #define AMD_MODEL_RANGE_START(range)	(((range) >> 12) & 0xfff)
 #define AMD_MODEL_RANGE_END(range)	((range) & 0xfff)
 
-static const int amd_erratum_1485[] =
-	AMD_LEGACY_ERRATUM(AMD_MODEL_RANGE(0x19, 0x10, 0x0, 0x1f, 0xf),
-			   AMD_MODEL_RANGE(0x19, 0x60, 0x0, 0xaf, 0xf));
-
 static bool cpu_has_amd_erratum(struct cpuinfo_x86 *cpu, const int *erratum)
 {
 	int osvw_id = *erratum++;
@@ -1158,6 +1154,9 @@ static void init_amd_zen3(struct cpuinfo_x86 *c)
 static void init_amd_zen4(struct cpuinfo_x86 *c)
 {
 	init_amd_zen_common();
+
+	if (!cpu_has(c, X86_FEATURE_HYPERVISOR))
+		msr_set_bit(MSR_ZEN4_BP_CFG, MSR_ZEN4_BP_CFG_SHARED_BTB_FIX_BIT);
 }
 
 static void init_amd(struct cpuinfo_x86 *c)
@@ -1256,10 +1255,6 @@ static void init_amd(struct cpuinfo_x86 *c)
 
 	check_null_seg_clears_base(c);
 
-	if (!cpu_has(c, X86_FEATURE_HYPERVISOR) &&
-	     cpu_has_amd_erratum(c, amd_erratum_1485))
-		msr_set_bit(MSR_ZEN4_BP_CFG, MSR_ZEN4_BP_CFG_SHARED_BTB_FIX_BIT);
-
 	/* AMD CPUs don't need fencing after x2APIC/TSC_DEADLINE MSR writes. */
 	clear_cpu_cap(c, X86_FEATURE_APIC_MSRS_FENCE);
 }
-- 
2.48.1