Ack: [SRU][N:linux][PATCH v2 0/2] CXL: Fix slab-out-of-bounds in cxl_setup_parent_dport

[Aaron Ma]

Acked-by: Aaron Ma <aaron.ma at canonical.com>

On Fri, Jan 9, 2026 at 7:25 PM Thibault Ferrante
<thibault.ferrante at canonical.com> wrote:
>
> BugLink: https://bugs.launchpad.net/bugs/2130240
>
> [ Impact ]
>
>  * Fix slab-out-of-bounds cxl enabled guest image, boot the guest without issue.
>
> [ Fix ]
>
>  * Clean cherry-pick fix from upstream:
>   8c251c5ab1b cxl/pci: Get AER capability address from RCRB only for RCH dport
>   2c402bd2e85b4 cxl/test: Skip cxl_setup_parent_dport() for emulated dports
>
> [ Test Plan ]
>
>  * Compiled.
>
> [ Where problems could occur ]
>
>  * Regression in cxl enabled systems.
>
> [ Other Info ]
>
>  * This is a public version of: https://bugs.launchpad.net/ubuntu/+bug/2104166
>
> v2: add subsequent upstream commit:
> 2c402bd2e85b4 cxl/test: Skip cxl_setup_parent_dport() for emulated dports
>
> Li Ming (2):
>   cxl/pci: Get AER capability address from RCRB only for RCH dport
>   cxl/test: Skip cxl_setup_parent_dport() for emulated dports
>
>  drivers/cxl/core/pci.c        | 10 ++++++----
>  tools/testing/cxl/Kbuild      |  1 +
>  tools/testing/cxl/test/mock.c | 12 ++++++++++++
>  3 files changed, 19 insertions(+), 4 deletions(-)
>
> --
> 2.51.0
>
>
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