[PATCH 1/2] smccc: minor code style clean-ups, no functional changes

Ivan Hu ivan.hu at canonical.com
Thu Aug 21 02:26:28 UTC 2025


Signed-off-by: Ivan Hu <ivan.hu at canonical.com>
---
 src/pci/smccc/smccc.c | 110 ++++++++++++++++++++----------------------
 1 file changed, 51 insertions(+), 59 deletions(-)

diff --git a/src/pci/smccc/smccc.c b/src/pci/smccc/smccc.c
index 144a0a24..dda1c3c3 100644
--- a/src/pci/smccc/smccc.c
+++ b/src/pci/smccc/smccc.c
@@ -51,10 +51,10 @@ enum {
 #define PCI_WRITE	 (0x84000133)
 #define PCI_GET_SEG_INFO (0x84000134)
 
-#define ARM_SMCCC_VERSION       	  0x80000000
-#define ARM_SMCCC_ARCH_FEATURES 	  0x80000001
-#define ARM_SMCCC_ARCH_SOC_ID    	  0x80000002
-#define ARM_SMCCC_ARCH_SOC_ID_SMC64   0xC0000002
+#define ARM_SMCCC_VERSION		0x80000000
+#define ARM_SMCCC_ARCH_FEATURES		0x80000001
+#define ARM_SMCCC_ARCH_SOC_ID		0x80000002
+#define ARM_SMCCC_ARCH_SOC_ID_SMC64	0xC0000002
 
 #define SOC_ID_TYPE_VERSION  0x0
 #define SOC_ID_TYPE_REVISION 0x1
@@ -63,8 +63,8 @@ enum {
 #define SMCCC_VERSION_1_1 0x10001
 #define SMCCC_VERSION_1_2 0x10002
 
-#define ARM_SMCCC_RET_NOT_SUPPORTED -1
-#define ARM_SMCCC_SUPPORTED 		 0
+#define ARM_SMCCC_RET_NOT_SUPPORTED    -1
+#define ARM_SMCCC_SUPPORTED		0
 
 /* SMCCC API id to name mapping */
 typedef struct {
@@ -94,10 +94,10 @@ typedef struct {
 
 
 static SMCCC_func_id_t SMCCC_func_id_list[] = {
-	{ ARM_SMCCC_VERSION,	   	   "ARM_SMCCC_VERSION",			  false },
-	{ ARM_SMCCC_ARCH_FEATURES, 	   "ARM_SMCCC_ARCH_FEATURES",	  false },
-	{ ARM_SMCCC_ARCH_SOC_ID,	   "ARM_SMCCC_ARCH_SOC_ID",		  false },
-	{ ARM_SMCCC_ARCH_SOC_ID_SMC64, "ARM_SMCCC_ARCH_SOC_ID_SMC64", false }
+	{ ARM_SMCCC_VERSION,		"ARM_SMCCC_VERSION",		false },
+	{ ARM_SMCCC_ARCH_FEATURES,	"ARM_SMCCC_ARCH_FEATURES",	false },
+	{ ARM_SMCCC_ARCH_SOC_ID,	"ARM_SMCCC_ARCH_SOC_ID",	false },
+	{ ARM_SMCCC_ARCH_SOC_ID_SMC64,	"ARM_SMCCC_ARCH_SOC_ID_SMC64",	false }
 };
 
 static uint16_t smccc_major_version = 0;
@@ -250,21 +250,20 @@ static int smccc_version_test(fwts_framework *fw)
 		arg.conduit, smccc_pci_conduit_name(&arg));
 
 	int32_t return_value = arg.w[0];
-	
+
 	/* NOT_SUPPORTED is treated as v1.0 */
 	if(return_value == ARM_SMCCC_RET_NOT_SUPPORTED)
 	{
 		smccc_major_version = 1;
 		smccc_minor_version = 0;
-		fwts_log_info_verbatim(fw, "Arm SMCCC: Major version: %d, Minor version: %d",
+		fwts_log_info_verbatim(fw, "Arm SMCCC: Major version: %" PRIu16
+			", Minor version: %" PRIu16,
 			smccc_major_version, smccc_minor_version);
-	}
-	else
-	{
+	} else {
 		/* Bit 31 should not be 1. Bits 30...0 should be non 0 */
 		if((arg.w[0] >> 31) & 0x1 || ((arg.w[0] & 0x7FFFFFFF) == 0))
 		{
-			fwts_log_error(fw, "SMCCC_TEST_VERSION return value is invalid." 
+			fwts_log_error(fw, "SMCCC_TEST_VERSION return value is invalid."
 				"arg.w[0] = 0x%8.8" PRIx32,
 				arg.w[0]);
 			return FWTS_ERROR;
@@ -272,9 +271,9 @@ static int smccc_version_test(fwts_framework *fw)
 
 		smccc_major_version = arg.w[0] >> 16;
 		smccc_minor_version = arg.w[0] & 0x0000ffff;
-		fwts_log_info_verbatim(fw, "Arm SMCCC: Major version: %d, Minor version: %d",
+		fwts_log_info_verbatim(fw, "Arm SMCCC: Major version: %" PRIu16
+			", Minor version: %" PRIu16,
 			smccc_major_version, smccc_minor_version);
-
 	}
 
 	fwts_passed(fw, "Arm SMCCC_VERSION test passed");
@@ -285,24 +284,23 @@ static int smccc_version_test(fwts_framework *fw)
 /*
  * smccc_arch_features_bbr_check()
  * Asserts based on the Arm BBR specification rules in
- * Section 4.1. SMCCC architecture call requirements 
+ * Section 4.1. SMCCC architecture call requirements
  * This function can be run only if SBBR or EBBR flag is set
  * while running FWTS
  */
-
  static int smccc_arch_features_bbr_check(fwts_framework *fw)
  {
 	uint32_t version = (smccc_major_version << 16) + smccc_minor_version;
-	bool bbr_check_failed = false; 
+	bool bbr_check_failed = false;
 	uint16_t assert_failed_count = 0;
-	int i=0;
+	int i = 0;
 
-	fwts_log_info_verbatim(fw, "SMCCC Arm BBR check - the detected SMCCC version is %d.%d",
+	fwts_log_info_verbatim(fw, "SMCCC Arm BBR check - the detected SMCCC version is %" PRIu16 ".%" PRIu16,
 		smccc_major_version, smccc_minor_version);
 
-	for (i=0; i<FWTS_ARRAY_SIZE(SMCCC_func_id_list); i++)
+	for (i=0; i < FWTS_ARRAY_SIZE(SMCCC_func_id_list); i++)
 	{
-		if(SMCCC_func_id_list[i].implemented == false)
+		if (SMCCC_func_id_list[i].implemented == false)
 		{
 			switch (SMCCC_func_id_list[i].SMCCC_func_id)
 			{
@@ -314,8 +312,8 @@ static int smccc_version_test(fwts_framework *fw)
 						bbr_check_failed = true;
 					}
 				}
-				break; 
-				
+				break;
+
 				case ARM_SMCCC_ARCH_SOC_ID:
 				{
 					if(version >= SMCCC_VERSION_1_2)
@@ -328,15 +326,16 @@ static int smccc_version_test(fwts_framework *fw)
 				default:
 				{
 					fwts_log_info_verbatim(fw, "Info: Function_id: 0x%8.8" PRIx32 " (%s) is not Implemented."
-						" However this function is not \"Required\" for this version of SMCCC as per the Arm BBR specification",
+						" However this function is not \"Required\" for this version of SMCCC as per the "
+						"Arm BBR specification",
 						SMCCC_func_id_list[i].SMCCC_func_id,
 						SMCCC_func_id_list[i].SMCCC_func_id_name);
 				}
 			}
-			if(bbr_check_failed == true)
+			if (bbr_check_failed == true)
 			{
 				fwts_log_error(fw, "failed: As per Arm BBR specifciation, "
-					"the implementation of %s is required in SMCCC v%d.%d"
+					"the implementation of %s is required in SMCCC v%" PRIu16 ".%" PRIu16
 					, SMCCC_func_id_list[i].SMCCC_func_id_name
 					, smccc_major_version, smccc_minor_version);
 				bbr_check_failed = false;
@@ -356,12 +355,10 @@ static int smccc_version_test(fwts_framework *fw)
 	return FWTS_OK;
  }
 
-
 /*
  *  smccc_arch_soc_features()
  *	test SMCCC function ARCH_FEATURES
  */
-
  static int smccc_arch_features(fwts_framework *fw)
  {
 	int ret;
@@ -369,16 +366,18 @@ static int smccc_version_test(fwts_framework *fw)
 	struct smccc_test_arg arg = { };
 	
 
-	for (i=0; i<FWTS_ARRAY_SIZE(SMCCC_func_id_list); i++)
+	for (i=0; i< FWTS_ARRAY_SIZE(SMCCC_func_id_list); i++)
 	{
 		memset(&arg, 0, sizeof(arg));
 		arg.size = sizeof(arg);
 		arg.w[0] = ARM_SMCCC_ARCH_FEATURES;
-		
-		/* arg.w[1] should contain, the function id of an 
-		 * Arm Architecture Service Function to query about */
+
+		/*
+		 * arg.w[1] should contain, the function id of an
+		 * Arm Architecture Service Function to query about
+		 */
 		arg.w[1] = SMCCC_func_id_list[i].SMCCC_func_id;
-	
+
 		ret = ioctl(smccc_fd, SMCCC_TEST_ARCH_FEATURES, &arg);
 		if (ret < 0) {
 			fwts_log_error(fw, "SMCCC test driver ioctl SMCCC_TEST_ARCH_FEATURES "
@@ -387,9 +386,9 @@ static int smccc_version_test(fwts_framework *fw)
 		}
 		if (smccc_pci_conduit_check(fw, &arg) != FWTS_OK)
 			return FWTS_ERROR;
-	
+
 		int32_t return_value = arg.w[0];
-		
+
 		if (return_value < 0)
 		{
 			fwts_log_info_verbatim(fw, "   Features query for function_id: 0x%8.8" PRIx32
@@ -401,9 +400,7 @@ static int smccc_version_test(fwts_framework *fw)
 				return_value,
 			    SMCCC_func_id_list[i].SMCCC_func_id);
 			SMCCC_func_id_list[i].implemented = false;
-		}
-		else if (return_value == ARM_SMCCC_SUPPORTED)
-		{
+		} else if (return_value == ARM_SMCCC_SUPPORTED) {
 			fwts_log_info_verbatim(fw, "   Features query for function_id: 0x%8.8" PRIx32
 				" for %s"
 				" returned: \"SUPPORTED\" (%d)",
@@ -411,15 +408,13 @@ static int smccc_version_test(fwts_framework *fw)
 				SMCCC_func_id_list[i].SMCCC_func_id_name,
 				return_value);
 			SMCCC_func_id_list[i].implemented = true;
-		}
-		else
-		{
+		} else {
 			/* return_value > 0 */
 			fwts_log_error(fw, "   Features query for function_id: 0x%8.8" PRIx32
 				" for %s"
 				" returned: \"OPTIONAL FUNCTION IMPLEMENTED\" (%d)"
 				"\n      Function 0x%8.8" PRIx32 " may support additional capabilities specific to the function ID. ",
-				SMCCC_func_id_list[i].SMCCC_func_id, 
+				SMCCC_func_id_list[i].SMCCC_func_id,
 				SMCCC_func_id_list[i].SMCCC_func_id_name,
 				return_value,
 			    SMCCC_func_id_list[i].SMCCC_func_id);
@@ -444,10 +439,9 @@ static int smccc_version_test(fwts_framework *fw)
 
 /*
  *  smccc_arch_soc_id_test()
- *	test SMCCC function ARCH_SOC_ID for 
- *  SoC_ID_Type = 0 (Version)
+ *	test SMCCC function ARCH_SOC_ID for
+ *  	SoC_ID_Type = 0 (Version)
  */
-
 static int smccc_arch_soc_id_test_type0(fwts_framework *fw)
 {
 	int ret;
@@ -472,7 +466,7 @@ static int smccc_arch_soc_id_test_type0(fwts_framework *fw)
 	/* Bit 31 should not be 1. Bits 30...0 should be non 0 */
 	if((arg.w[0] >> 31) & 0x1 || ((arg.w[0] & 0x7FFFFFFF) == 0))
 	{
-		fwts_log_error(fw, "SMCCC_TEST_ARCH_SOC_ID return value is invalid." 
+		fwts_log_error(fw, "SMCCC_TEST_ARCH_SOC_ID return value is invalid."
 			"arg.w[0] = 0x%8.8" PRIx32,
 			arg.w[0]);
 		fwts_failed(fw, LOG_LEVEL_HIGH, "Arm SMCCC_ARCH_SOC_ID test for ",
@@ -485,7 +479,7 @@ static int smccc_arch_soc_id_test_type0(fwts_framework *fw)
 	uint32_t JEP_106_Bank_Index = (arg.w[0] >> 24) & 0x000000ff;
 
 	fwts_log_info_verbatim(fw, "  SMCCC_TEST_ARCH_SOC_ID result for SoC_ID_type = %" PRIx16 
-		"\n   JEP-106 identification bank index for the SiP : 0x%2.2" PRIx16 
+		"\n   JEP-106 identification bank index for the SiP : 0x%2.2" PRIx16
 		"\n   JEP-106 identification code with parity bit for the SiP : 0x%2.2" PRIx16
 		"\n   Implementation defined SoC ID : 0x%4.4" PRIx16
 		"\n   Info: arg.w[0] full result : 0x%8.8" PRIx32 ,
@@ -496,13 +490,11 @@ static int smccc_arch_soc_id_test_type0(fwts_framework *fw)
 	return FWTS_OK;
 }
 
-
 /*
  *  smccc_arch_soc_id_test()
  *	test SMCCC function ARCH_SOC_ID for
  *  SoC_ID_Type = 1 (Revision)
  */
-
 static int smccc_arch_soc_id_test_type1(fwts_framework *fw)
 {
 	int ret;
@@ -524,7 +516,7 @@ static int smccc_arch_soc_id_test_type1(fwts_framework *fw)
 	/* Bit 31 should not be 1. Bits 30...0 should be non 0 */
 	if((arg.w[0] >> 31) & 0x1 || ((arg.w[0] & 0x7FFFFFFF) == 0))
 	{
-		fwts_log_error(fw, "SMCCC_TEST_ARCH_SOC_ID return value is invalid." 
+		fwts_log_error(fw, "SMCCC_TEST_ARCH_SOC_ID return value is invalid."
 			"arg.w[0] = 0x%8.8" PRIx16,
 			arg.w[0]);
 		fwts_failed(fw, LOG_LEVEL_HIGH, "Arm SMCCC_ARCH_SOC_ID test for ",
@@ -537,7 +529,7 @@ static int smccc_arch_soc_id_test_type1(fwts_framework *fw)
 
 	uint32_t SoC_revision = arg.w[0] & 0x7fffffff;
 
-	fwts_log_info_verbatim(fw, "  SMCCC_TEST_ARCH_SOC_ID result for SoC_ID_type = %" PRIx16 
+	fwts_log_info_verbatim(fw, "  SMCCC_TEST_ARCH_SOC_ID result for SoC_ID_type = %" PRIx16
 		"\n   SoC Revision: 0x%8.8" PRIx32
 		"\n   Info: arg.w[0] full result : 0x%8.8" PRIx32,
 		SOC_ID_TYPE_REVISION, SoC_revision, arg.w[0]);
@@ -676,10 +668,10 @@ static fwts_framework_minor_test smccc_tests[] = {
 	{ smccc_pci_version_test,	"Test PCI_VERSION" },
 	{ smccc_pci_features_test,	"Test PCI_FEATURES" },
 	{ smccc_pci_get_seg_info,	"Test PCI_GET_SEG_INFO" },
-	{ smccc_version_test,	        "Test ARM_SMCCC_VERSION " },
-	{ smccc_arch_features,	        "Test ARM_SMCCC_ARCH_FEATURES " },
-	{ smccc_arch_soc_id_test_type0,	"Test ARM_SMCCC_ARCH_SOC_ID for Soc_ID_type 0 " },
-	{ smccc_arch_soc_id_test_type1,	"Test ARM_SMCCC_ARCH_SOC_ID for Soc_ID_type 1 " },
+	{ smccc_version_test,	        "Test ARM_SMCCC_VERSION" },
+	{ smccc_arch_features,	        "Test ARM_SMCCC_ARCH_FEATURES" },
+	{ smccc_arch_soc_id_test_type0,	"Test ARM_SMCCC_ARCH_SOC_ID for Soc_ID_type 0" },
+	{ smccc_arch_soc_id_test_type1,	"Test ARM_SMCCC_ARCH_SOC_ID for Soc_ID_type 1" },
 	{ NULL, NULL }
 };
 
-- 
2.34.1




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